|Disruptive Engineering is about technologies that will drive the electronics industry this year. The blog features your nominations of enabling technologies and applications that you believe could change the way we work or play, or something that you think will affect most electronics projects in 2013.|
2013 - Jan.
Posted: 12:08:44 PM, 09/01/2013
FinFETs to enable new generations of high-density, high-performance, ultra-low-power SoCs
Cadence this year is nominating the FinFET, a new type of 3D transistor that promises significant power and performance advantages over the planar devices that are in common use today. FinFETs are now expected to come into common use at process nodes below 20nm, where they will allow semiconductor and systems companies to continue to develop commercially viable chips for the mobile devices that are dominating the consumer market. FinFETs will thus enable new generations of high-density, high-performance and ultra-low-power systems on chip (SoCs) for future smart phones, tablets and other advanced mobile devices.
Like any new semiconductor technology, FinFETs will rely on an ecosystem that includes EDA tools, process design kits (PDKs), physical IP, and silicon-proven manufacturing processes. Early collaboration and R&D investment by EDA vendors, IP providers, foundries, and semiconductor companies is crucial. In the coming year Cadence will continue actively working with its partners on EDA support, SPICE models, and test chips for next generation SoCs at 14nm and beyond.
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